Instruction set

美 [ɪnˈstrʌkʃn set]英 [ɪnˈstrʌkʃn set]
  • 网络指令集;指令系统;指令组
Instruction setInstruction set
  1. Reduced instruction Set Computers ( RISC ) have the features such as the advantage of price performance and the shorter design cycle .

    精简指令系统计算机(RISC)以其在性能价格比上所占的优势以及设计周期短等特点而得到迅速发展。

  2. Other differences lie in the instruction set , internal architecture , and control signals .

    其他差别是在指令系统,内部结构和控制信号方面。

  3. Two Important Aspects in the Instruction Set of Assembly Language Teaching

    汇编语言指令系统教学中应该重视的两个方面问题

  4. Research of instruction set recognition based on decision theory

    基于决策理论的指令集识别技术研究

  5. I want to see which instruction set is used .

    我想看看用的是什么指令集。

  6. Design and Implementation of General Instruction Set Description Language

    通用指令集描述语言的设计和实现

  7. Design and Implementation of DSP Instruction Set Simulation

    DSP指令集仿真器的设计与实现

  8. Research and Realization on Analysis Method of Application Features Faced Instruction Set Design of Specific Processor

    面向专用处理器指令集设计的应用特征分析方法研究与实现

  9. Architecture Design and VLSI Implementation of an Application Specific Instruction Set Security Processor

    一种专用指令集安全处理器的架构设计与实现

  10. A Self-reconfigurable System Design of Dynamic Instruction Set Computer CPU

    动态指令集计算机处理器的自重构系统设计

  11. Third , it is a method by which instruction set is realized in simulation design .

    CK-Simulator的设计中,指令集的功能使用一个类实现,每一条指令形成一个完全独立的方法,这种结构保证了每条指令完全独立的特性,使以后的指令扩展也非常容易。

  12. The instruction set is extended in order to improve the efficiency in particular application .

    在兼容原有指令集的基础上进行了扩充,提升了特定应用的效率。

  13. A Design and Optimization of ARM Instruction Set Simulator

    一种ARM指令集仿真器的实现与优化

  14. CPU Hard Core Design Based on MCS-51 Instruction Set

    基于MCS-51指令集的CPU硬核设计

  15. High Performance Instruction Set Simulator Using Dynamic Decode Cache

    采用动态译码缓存的高速指令集模拟器

  16. Structure simulator and instruction set simulator have different type ofthe software simulator .

    软件仿真器分为结构仿真器和指令集软件仿真器。

  17. Research of Java Instruction Set Architecture

    Java指令集结构的研究

  18. A Minimum Instruction Set Testing Algorithm Based on Microinstruction Coverage

    基于微指令覆盖的最小指令集测试算法

  19. A low-cost , high-performance application specific instruction set security processor is proposed in this paper .

    本文基于专用指令集架构提出了一种低成本、高性能的安全处理器解决方案,能够适用于各种嵌入式信息安全系统。

  20. Instruction Set Simulator is one important tools in design of processor , compiler and embedded system .

    指令集模拟器是处理器、编译器以及嵌入式系统设计中的重要工具之一。

  21. The features of instruction set architecture and application programs are the key factors to microprocessor architecture .

    指令系统和应用程序的特点是决定微处理器体系结构的关键因素。

  22. Testing results illustrate that DSP core is fully compatible with the target instruction set .

    最终的结果表明,该DSP内核在功能上完全兼容目标指令集。

  23. The Primary Research on the Technology of Processor Instruction Set Simulating for SoC System-Level Design

    适用于SoC系统级设计的处理器指令集仿真技术的初步研究

  24. Reduced Instruction Set Computer .

    精简指令集计算机。

  25. Since instruction set has changed , de-compilation becomes difficult .

    由于指令系统发生改变,反编译很难进行。

  26. It defines a virtual instruction set .

    定义了一套较灵活的虚拟指令集。

  27. Exploitation of Z-80 Instruction Set and the Design Skills of Z-80 Software

    Z-80软件设计技巧及指令系统的开发

  28. An Approach to the Abstract Instruction Set of Compilation Prolog

    编译Prolog抽象指令集探讨

  29. Branch - delay is one of the RISC ( Reduced Instruction Set Computer ) technology characters .

    延迟转移是RISC技术特点之一。

  30. New extension of instruction set and new add-on function unit can improve the performance of microprocessor greatly .

    对指令集进行扩展和添加新功能部件是提高处理器性能的有效途径。